|
| |
| | Embedded.com - Will Self-timed Asynchronous Logic Rescue CPU Design? |
 | | Asynchronous circuit designs were common in the early days of circuit design and can still be found here and there, not as an all-encompassing design methodology, but as a problem solver, after every synchronous design trick has run out of gas. | | | Although asynchronous designs usually require more transitions on a computational path than synchronously designed CPUs, the transitions usually only occur in areas involved in the current computational task. | | | With regards shifting to asynchronous design, the electronics and computer industry reminds me of the automobile industry as cars got bigger and faster, but also consumed more fuel and generated more pollution. |
|
http://www.embedded.com/story/OEG20020824S0001
(2638 words)
|
|
| |
| | Asynchronous Logic: Background |
| | Over the years the academics have improved the methodologies which can be applied to the design of asynchronous circuits, so a lot more is known about the reliability and correctness of potential solutions. | | | This is a straightforward process compared with validating an asynchronous circuit, where the design must be examined in very fine detail for critical races and unstable states, and then the higher levels checked for liveness and similar properties. | | | Asynchronous logic can be expected to begin winning niches in the digital electronics business within the next few years. |
|
http://www.cs.man.ac.uk/async/background/return_async.html
(2612 words)
|
|
| |
| | paper.doc |
| | Whereas the latter simply have to compute a valid result before the clock edge, asynchronous circuits may have minimum delays too; the prototype delay in a bounded-delay design is such a circuit. | | | Asynchronous control differs from synchronous control principally in that the asynchronous control circuitry, taken as a whole, is responsible for setting the timing of everything else on the chip. | | | Asynchronous control circuitry must be designed to handle a variety of contingencies regarding timing, and the testing harness must be able to cause at least most of these possibilities. |
|
http://www.cs.berkeley.edu/~smcpeak/cs250/paper.doc
(5870 words)
|
|
| |
| | Beating the Clock |
| | Although complete computers built on Sun Labs-developed asynchronous technologies may be years away, aspects of it may reach market sooner when embedded as specialized subsystems within larger, predominantly clocked-logic circuits. | | | The Asynchronous Design Group at Sun Microsystems Laboratories is onto ideas that may shift the dominant paradigm for integrated circuit design. | | | Synchronous circuits keep jogging in place." Asynchronous circuits achieve speed by allowing each gate to set its own pace rather than waiting for the next tick of a system clock, whose pace is set by the slowest part of the chip. |
|
http://research.sun.com/features/async
(1626 words)
|
|
| |
| | Sequential logic - Wikipedia, the free encyclopedia |
| | In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. | | | Asynchronous sequential logic is the most general kind of sequential logic, but because of its flexibility it is also the most difficult kind to design. | | | Sequential logic is therefore used to construct some types of computer memory, other types of delay and storage elements, and finite state machines. |
|
http://en.wikipedia.org/wiki/Sequential_logic
(1626 words)
|
|
| |
| | Bibliography generated from async.bib |
| | Asynchronous circuit synthesis by direct mapping: Interfacing to environment. | | | Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems. | | | Practical advances in asynchronous design and in asynchronous/synchronous interfaces. |
|
http://www.win.tue.nl/async-bib/doc/async.html
(4988 words)
|
|
| |
| | World's First Flexible 8-Bit Asynchronous Microprocessor |
| | The combination of Epson's original SUFTLA technology, LTPS-TFTs technology, and asynchronous circuit design technology has made it possible for Epson to create stable displays that are large in size, and that use substrates that are both flexible and variable in shape. | | | Seiko Epson has announced that it has developed the world's first flexible 8-bit asynchronous microprocessor using low-temperature polysilicon thin-film transistors (LTPS-TFTs) on a plastic substrate. | | | SUFTLA is an Epson developed technique that makes it possible to transfer LTPS-TFT circuits onto flexible substrates. |
|
http://www.physorg.com/news3032.html
(366 words)
|
|
| |
| | CmpE 280 - DESIGN OF LOGIC CIRCUITS |
| | Design synchronous and asynchronous sequential circuits, and use a computer simulator to verify the design. | | | There are three design projects, one each of combinational circuit design, synchronous sequential circuit design and asynchronous sequential circuit design. | | | Boolean Algebra; combinational logic circuits; synchronous sequential circuits asynchronous sequential circuits; design problems using TTL integrated circuits. |
|
http://www.cs.engr.uky.edu/~tony/cpe/cmpe_www/bs/cmpe_courses/cmpe280.html
(366 words)
|
|
| |
| | Embedded.com - Will Self-timed Asynchronous Logic Rescue CPU Design? |
| | Asynchronous circuit designs were common in the early days of circuit design and can still be found here and there, not as an all-encompassing design methodology, but as a problem solver, after every synchronous design trick has run out of gas. | | | Although asynchronous designs usually require more transitions on a computational path than synchronously designed CPUs, the transitions usually only occur in areas involved in the current computational task. | | | Although it is being resisted fiercely as an all-encompassing design methodology, major semiconductor firms such as Intel, TI, IBM, and LSI Logic are selectively making use of asynchronous self-clocking mechanisms in their designs. |
|
http://www.embedded.com/story/OEG20020824S0001
(366 words)
|
|
| |
| | Computer Power User Article - Asynchronous Logic |
| | Intel Fellow Shekhar Borkar heads Intel's circuit lab and is actively involved in evaluating the merits of asynchronous technology. | | | Because asynchronous logic is clock gated by nature, it consumes about 40% less power than a synchronous circuit, according to Andrew Lines, CTO of Fulcrum. | | | Therefore, asynchronous logic performs at the average delay imposed by logic paths (some might be slower and others faster). |
|
http://www.computerpoweruser.com/editorial/article.asp?article=articles/archive/c0505/27c05/27c05.asp&emid=127371
(366 words)
|
|
| |
| | asynchronous transfer mode - encyclopedia article about asynchronous transfer mode. |
| | Asynchronous Transfer Mode, or ATM for short, is a cell relay network protocol which encodes data traffic into small fixed sized (53 byte; 48 bytes of data and 5 bytes of header information) cells instead of variable sized packets as in packet-switched networks (such as the Internet Protocol or Ethernet). | | | A virtual circuit (VC) is a communications arrangement in which data from a source user may be passed to a destination user over more than one real communications circuit during a single period of communication, but the switching is hidden from the users. | | | In computer networking and telecommunications, packet switching is the now-dominant communications paradigm, in which packets (units of information carriage) are individually routed between nodes over data links which might be shared by many other nodes. |
|
http://encyclopedia.thefreedictionary.com/Asynchronous+Transfer+Mode
(4257 words)
|
|
| |
| | TA: Tech Search |
| | BMDO is interested in applying asynchronous circuits to high-speed computers. | | | Asynchronous design eliminates the timing issues that can be a headache for software developers. | | | Unfortunately, the Boolean logic circuit itself cannot decide when to receive or release data, therefore a clock must be added to control input and output. |
|
http://www.mdatechnology.net/techsearch.asp?articleid=276
(4257 words)
|
|
| |
| | School of Computer & Information Science - University of South Australia |
| | When completion detection is used in asynchronous circuit design the computation rate tends towards the average rate of the system components rather than the worst case rate of components as in clocked systems. | | | Asynchronous logic circuits are an active area of research with a new annual conference and a substantial output of journal publications every year. | | | Asynchronous circuits are more modular because they rely only on local communication between components as compared to circuits with global clocking. |
|
http://www.cis.unisa.edu.au/~cisdak/nResearch/Async.html
(4257 words)
|
|
| |
| | Start and stop system - Patent 4101732 |
| | A start and stop control apparatus according to claim 1, wherein said shift register comprises N stages, said control circuit and sampling pulse output circuit each including a predetermined number of terminals, the terminals of the control circuit being coupled to the first stage, second stage, third stage,. | | | A start and stop control apparatus according to claim 1, wherein said binary first information items have a binary "0" level and said binary second information item has a binary "1" level. | | | means for storing binary second information items throughout the shift register in response to the stop bit pulse of each data frame. |
|
http://www.freepatentsonline.com/4101732.html
(2153 words)
|
|
| |
| | Asynchronous communications system - Patent 4803481 |
| | The communications system of claim 1 wherein said master comprises at least one transmitter circuit having conditioning means receptive of an input signal of high and low logical states for providing a conditioned signal to one of said channels of the same logical state as said input signal. | | | The communications system of claim 1 wherein said slave comprises at least one transmitter circuit having conditioning means receptive of an input signal of high and low logical states for providing a conditioned signal to one of said channels of the same logical state as said input signal. | | | For example, if the communicating unit is a microcomputer, the protocol for communication can be in the form of device driver software for interfacing with the computer operating system. |
|
http://www.freepatentsonline.com/4803481.html
(9613 words)
|
|
| |
| | Fulcrum -- Library |
| | Bundled data was another asynchronous style that took a synchronous circuit and replaced the global clock with a local handshake that contained a delay element which created a timing dependency per logic stage. | | | Asynchronous provides an elegant solution that solves these problems without burning a lot of design time on work-around and jury-rigged fixes. | | | While it's true that the greater the amount of asynchronous logic in a chip the greater the benefit, it is also true that in virtually all cases asynchronous chips contain standard synchronous interfaces for interconnection among other chips in a system. |
|
http://www.fulcrummicro.com/techasync_faq.html
(9613 words)
|
|
| |
| | Asynchronous Communication |
| | The asynchronous communication technique is a transmission technique which is most widely used by personal computers to provide connectivity to printers, modems, fax machines, etc. This allows a series of bytes (or ASCII characters) to be sent along a single wire (actually a ground wire is required to complete the circuit). | | | Most computers support asynchronous communication, not all computers support synchronous serial communication. | | | An asynchronous link communicates data as a series of characters of fixed size and format. |
|
http://www.erg.abdn.ac.uk/users/gorry/eg2069/async.html
(1013 words)
|
|
| |
| | EETimes.com - University spinouts revive clockless processors |
| | Asynchronous logic does away with the clock signals that conventional logic uses to control circuit activity. | | | Asynchronous Digital Design (ADD), based in Pasadena, Calif., was spun out of the California Institute of Technology in January 2000. | | | Two-year-old Asynchronous Digital Design Inc. in the United States is flush with $16 million from a recent investment round, while U.K.-based Self-Timed Solutions Ltd. comprises a team of university researchers still working on their business plan and a pitch for venture capitalists. |
|
http://www.eetimes.com/story/OEG20011025S0074
(1013 words)
|
|
| |
| | Asynchronous Automata and Binary Valued Mathematics |
| | - asynchronous automata, also called asyynchronous circuits, asynchronous systems, timed automata, switching circuits, boolean circuits etc. by others | | | Towards a Mathematical Theory of the Delays of the Asynchronous Circuits, Analele Universitatii din Oradea, Fascicola Matematica, TOM IX, 2002 | | | Examples of Models of the Asynchronous Circuits, the 10-th Symposium of Mathematics and its Applications, "Politehnica" University of Timisoara, Timisoara, 2003 |
|
http://www.geocities.com/serbanvlad
(1013 words)
|
|
| |
| | Asynchronous negative logic synthesis from STG-like specifications (ResearchIndex) |
| | 78 Algorithms for Synthesis and Testing of Asynchronous Circuit.. | | | 1 On partial state-based approach to asynchronous circuits syn.. | | | Then before we consider properties of negative logic itself it would be useful to have a look on the well known problem of the Elimination of CSC violation from new point of view based on pseudometrics... |
|
http://citeseer.ist.psu.edu/259157.html
(1013 words)
|
|
| |
| | Toggit Certification Home for MCSE CCNA A+ study guides and test prep |
| | In an Asynchronous Transfer Mode (ATM) cell header, a 16-bit field used to identify virtual channels between users or between users and networks. | | | In an Asynchronous Transfer Mode Virtual Private Network (ATM) cell header, an 8-bit field used to identify virtual paths between users or between users and networks. | | | A virtual circuit is maintained only for as long as the customer requires a connection; the next time a call is placed, a different virtual circuit may be used. |
|
http://www.toggit.com/Library/pedia/techno.asp?Term=v&Techno=Letter
(1013 words)
|
|
| |
| | EE Times UK - ARM, Philips spin-off to pioneer clockless processor |
| | Asynchronous logic is an alternative style of circuit design that does away with the clock signals of conventional logic, and uses logic modules that are self-timed and that pass results among one another using handshaking protocols. | | | An asynchronous RISC processor that followed the instruction set architecture of ARM rivals MIPS Technologies Inc. was developed at the academic predecesor to Fulcrum Microsystems Inc. (Calabasas Hills, Calif.). | | | Either way the partnership is a significant development for Handshake Solutions and for asynchronous logic in general. |
|
http://www.eetuk.com/bus/news/showArticle.jhtml?articleID=51200730
(1013 words)
|
|
| |
| | What is ATM? - A Word Definition From the Webopedia Computer Dictionary |
| | KnowledgeStorm: Asynchronous Transfer Mode - Business technology search site offering software, service, reseller and hardware information on thousands of IT solutions. | | | Short for Asynchronous Transfer Mode, a network technology based on transferring data in cells or packets of a fixed size. | | | NetTest: Asynchronous Transfer Mode (ATM) - Provides test, measurement and OSS solutions for telecommunication providers and enterprises, including Asynchronous Transfer Mode (ATM). |
|
http://www.webopedia.com/TERM/A/ATM.html
(1013 words)
|
|
| |
| | HC05 Overview |
| | In-circuit simulation allows you to use the actual inputs and outputs of your target during simulation of your code. | | | They provide an innovative interface to a user's target system for Windows�-based editing, assembly, software simulation, programming, and in-circuit simulation. | | | On-chip Serial Communications Interface (SCI) provides asynchronous communications, with software-selectable baud rates up to 250 K. The high-speed, synchronous 4-wire serial system Serial Peripheral Interface (SPI) is ideal for driving off-chip displays and peripherals. |
|
http://freescale.com/webapp/sps/site/overview.jsp?nodeId=016246zpdg2LcRkqhk
(1312 words)
|
|
| |
| | ACiD-WG Home Page |
| | The project "Petrify: methodology and tool for logic synthesis of asynchronous circuits", co-ordinated by UPC and involving PoliTo, UNew, Intel and Cadence, was selected as one of the ten finalist projects for the 2002 EU Descartes Prize for outstanding research through transnational collaboration. | | | , which should be of value to potential users of asynchronous circuit technology and to tools developers. | | | To demonstrate the strength of European RTD in asynchronous circuits and systems, participation in the annual "Async" international symposium was considered particularly desirable. |
|
http://www.scism.sbu.ac.uk/ccsv/ACiD-WG
(1312 words)
|
|
| |
| | A Programming Approach to the Design of Asynchronous Logic Blocks. |
| | Using the tool petrify, the net can be automatically validated (for freedom from deadlock and interference, and for implementability as a speed-independent circuit) and asynchronous logic can be automatically synthesised. | | | It facilitates the clear, succinct and precise specification of the way an asynchronous logic block is to interact with its environment. | | | A Programming Approach to the Design of Asynchronous Logic Blocks. |
|
http://www.informatik.uni-hamburg.de/TGI/pnbib/j/josephs_m_b1.html
(1312 words)
|
|
| |
| | Universal asynchronous receiver transmitter - Wikipedia, the free encyclopedia |
| | A UART or Universal Asynchronous Receiver-Transmitter is a piece of computer hardware that translates between parallel bits of data and serial bits. | | | A UART is usually an integrated circuit used for serial communications over a computer or peripheral device serial port. | | | An asynchronous transmission sends nothing over the interconnection when the transmitting device has nothing to send; but a synchronous interface must send "pad" characters to maintain synchronism between the receiver and transmitter. |
|
http://www.wikipedia.org/wiki/UART
(1040 words)
|
|
| |
| | High Level Design for Asynchronous Logic by Theseus Logic, Inc |
| | Specifically, they mentioned the drastic increase of clock frequency and the exponential increase of circuit complexity, and concluded that a novel asynchronous approach could be required to solve some of the industrys future problems. | | | Clock free, asynchronous circuits constitute an attractive SOC approach. | | | From the systems architecture point of view, it is much easier to build SOCs using asynchronous rather than synchronous blocks where multiple clock domains need to be interfaced. |
|
http://cramsession.bitpipe.com/detail/RES/990461590_958.html
(1040 words)
|
|
|
