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Topic: PA-RISC



  
 Risc, 6000 risc system, ibm risc 6000
Advanced risc machine Risc pc Risc 6000 Risc processor Hp9000 pa risc used Computer risc system Risc insurance Risc vs cisc
RISC was also heralded a more quantitative approach to computer architecture,...
RISC OS developers - the world's first 32-bit RISC operating system - used in Acorn, Advantage Six, Microdigital and RiscStation computers.
http://watchcomputer.com/risc.html   (1107 words)

  
 Hewlett-Packard Journal: Functional design of the HP PA 7300LC processor - Pa-Risc 7300lc - includes related article on timing flexibility - Product Information
Indeed, we have integrated twice as much cache on-chip as the PA 7100LC used externally in the HP 9000 Model 712/60 workstation (i.e., 128K bytes versus 64K bytes).
With the PA 7300LC, we felt that we could finally integrate enough cache memory on the processor chip to allow fast execution of real-world applications.
The PA 7300LC CPU core is derived from the PA 7100LC CPU design.[1,2] Although the PA 7300LC has many similarities with its predecessor, there are some key differences in the design that allowed us to meet our performance objectives.
http://www.findarticles.com/p/articles/mi_m0HPJ/is_n3_v48/ai_19540809   (1411 words)

  
 The Utah PA-RISC Code Snapshot
As long as the PA machines continue to be our main computing resource we will likely develop on and support them, but unless the funding situation changes, the PA will likely be dropped at some point.
Short term plans for the PA code are to continue our research efforts, and to make some progress on robustness and performance.
PA specific code is confined to some include files and routines in the C and math libraries.
http://www.cs.utah.edu/projects/flux/mach4-parisc/html/pamach.html   (1955 words)

  
 On Itanium, PA-RISC, Superdome and Server trends - Inperso - Network Magazine India
The RISC architecture has been in existence for more than 15 years now and we believe that the next generation of computing will require processor architecture with capabilities and performances surpassing those of RISC chips.
We also understand that there will be users who would like to migrate from a RISC environment to the Itanium processor family, and HP will provide the smoothest migration path for these customers.
Itanium does not cause a threat to the PA-RISC systems and we will continue developing and marketing PA-RISC based systems in future.
http://www.networkmagazineindia.com/200109/inperso2.htm   (1118 words)

  
 New Intel/HP Products Spell Doom for RISC
At the Intel Developer Forum, the Palo Alto, Calif.-based computer and printer maker is expected to announce a partnership with Santa Clara, Calif.-based chip making giant Intel (Quote, Chart) that will extend the lifespan of PA-RISC machines by turning them into Itanium-based ones.
Other RISC chips include Motorola (Quote, Chart) PowerPC chip, used in Apple Computer's (Quote, Chart) PowerPC Macs, DEC's Alpha (now owned by HP) and Sun Microsystems' (Quote, Chart) SPARC.
The RISC chip was developed at IBM (Quote, Chart) in the early '70s and needed fewer operating instructions (hence the name), was faster than CISC processors (at least when executing simple instructions), and was even cheaper to manufacture.
http://siliconvalley.internet.com/news/article.php/1585561   (733 words)

  
 LostCircuits, CPU Guide
Major differences between the IBM Power4 and the HP PA-8800 RISC processor are in the cache architecture.
With the new PA-8800 RISC processor, HP is going a different route, that is, instead of using physically separate processors, the new concept involves placing two entire PA-8700 CPU cores in the same package.
There are some similarities between the IBM Power4 and the HP PA-8800 RISC processor.
http://www.lostcircuits.com/cpu/hp_pa8800   (745 words)

  
 BYTE.com
Nevertheless, for compatibility it executes all old 32-bit PA RISC code.
There already seems to be s ome convergence between Intel's P6 and HP's PA-8000, particularly in the area of the out-of-order execution hardware, and it becomes less difficult to imagine a hybrid between the two architectures.
It's interesting to note that both Intel and HP have made a decisive move toward intelligent hardware scheduling and that both are relying less on smart compiler technology than are many other RISC vendors.
http://www.byte.com/art/9507/sec11/art1.htm   (1710 words)

  
 GCC Computers Ltd.
The HP 9000 server family are World-class computing with the newest and highest-ever performance HP PA-8800 RISC processors and the HP-UX 11i v1 operating environment.
The Hewlett Packard (HP) Integrity server family brings you a winning combination of HP expertise in system design and the industry-leading Intel® Itanium® processor, resulting in unprecedented performance and flexibility based on industry-standards for enabling business agility and better return on IT.
Whatever type of servers your solution requires-from entry-level, single-processor systems up to the high-end, 128-processor Superdome-HP 9000 servers based on the PA-8800 processor provide the flexibility, performance, price/performance, and simplicity you need.
http://www.gcc.com.cy/hardware.html   (586 words)

  
 Real World Technologies - The Looming Battle in 64 Bit Land
The high end computing market is currently the exclusive reserve of 64-bit RISC processor families such as the Compaq Alpha, SGI MIPS, HP PA-RISC, IBM Power, and Sun SPARC.
Curiously, both IBM and Compaq are planning the schizophrenic strategy of offering systems based on both IA-64 processors and their own respective RISC processors.
Most of the flagship parts of the competing RISC processor families, along with the Merced/Itanium IA-64 processor, will be manufactured in 0.18 um technologies within the next six to twelve months.
http://www.realworldtech.com/page.cfm?articleid=RWT062000000000   (707 words)

  
 Planning the Revolution: Developing the Itanium Processor Family
The entire previous generation PA-RISC processor chip had used only 850,000 transistors for the entire processor.
That there was inherent mathematical complexity in out-of-order superscalar RISC machines that would prevent them ever from sustaining over about four instruction executions per cycle in the best-case scenario.
Discover the roots of the Intel Itanium processor family, and learn how a partnership between Intel and Hewlett-Packard yielded the next generation of processor architecture.
http://www.informit.com/articles/article.asp?p=32053&seqNum=3   (1504 words)

  
 Itanium
HP's DEC Alpha and PA-RISC family lines are being retired in favor of Itanium hardware.
Its native instruction set is the new IA-64, but it can run x86 code (slowly) in a firmware emulation mode, and has hooks for PA-RISC family migration.
Where the Itanium breaks with current RISC design philosophy is in how it feeds instructions into those core units.
http://www.yotor.com/wiki/en/it/Itanium.htm   (1695 words)

  
 Hardware Considerations
This enhancement to the typical RISC instruction set was a direct result of research by HP for a processor design optimized over the full range of technical and commercial applications.
It was one of the first commercially available RISC processors, including the fixed-size, hardware-inspired instructions common to RISC designs, but also including additional instructions for manipulating strings and other data types used in commercial processing.
processor family uses a new architecture called Explicitly Parallel Instruction Computing (EPIC).
http://h30097.www3.hp.com/docs/porting/tru64-to-hpux/CHPHRDWR.HTM   (3576 words)

  
 GeekCoffee Technology News and Reviews
HP's PA/RISC chips have been powering HP Unix servers since the 1980's.
According to sources, HP is releasing its last chip in the PA/RISC family that powers its high-performance and high-availability network servers.
Closing out this family is part of HP's plans to move its customer base to the Itanium platform, which HP co-designed with Intel in the 1990's.
http://www.geekcoffee.net/archives/2005/05/hp_releases_fin.html   (294 words)

  
 Hewlett-Packard PA-RISC 8800
Like all advanced RISC processors the PA-8700(+) has out-of-order execution, the sequence of instructions being determined by the instruction reorder buffer (IRB) which contains an ALU buffer that drives the computational functional units and a memory buffer that controls the load/store units.
When speculative branches have been mis-predicted the dependent instructions are retired from the IRB and new candidate instructions replace them.
The Address Reorder Buffer sets the priority for the loads and tries to load from the alternate halves every cycle.
http://www.top500.org/ORSC/2004/pa-risc.html   (822 words)

  
 PA-RISC family - Wikipedia, the free encyclopedia
As the name implies, it is an implementation using a RISC design, where the PA stands for Precision Architecture.
The design is also referred to as HP/PA for Hewlett Packard Precision Architecture.
PA is considered by some to stand for Palo Alto, the location of HP's headquarters.
http://en.wikipedia.org/wiki/PA-RISC_family   (738 words)

  
 Merced Facts and Speculations
Perhaps increasing of the number of functional units is not such a difficult problem for RISC processor and is not so easy for EPIC as it is assumed by EPIC/IA-64 developers.
By the way, Intel Corporation has a license from Advanced RISC Machines to produce, sell and enhance the StrongARM (developed by Digital Corporation, DEC has licensed the ARM architecture) microprocessor family.
EPIC is jointly defined by HP and Intel, they claim EPIC to be fundamental architecture technology, analogous to CISC and RISC.
http://www.microprocessor.sscc.ru/Merced   (4595 words)

  
 HP Press Release - HP Announces World's Most Powerful Microprocessor
PA-RISC is clearly the computer industry's leading RISC architecture."
PA-RISC technology has evolved through many different processor implementations over the past eight years.
According to the January 1995 issue of the newsletter "Inside the New Computer Industry," total RISC-systems revenue for 1994 was $29.3 billion (U.S.), with PA-RISC achieving the leadership position with 32.7 percent market share.
http://www.cpushack.net/CIC/announce/1995/pa8000.html   (1009 words)

  
 Breaking News--HP Delivers the Last of the PA-RISC Processors
The PA-8900 is not a radical departure from the current "Mako" PA-8800 processor, which was announced in February 2004 as HP's first dual-core RISC processor.
And today, the last of its home-grown RISC chips, the PA-RISC 8900, was launched.
The PA-8900 has been in development for years, just in case the migration to the Itanium line of RISC-like processors did not go as smoothly as planned.
http://www.itjungle.com/breaking/bn053105-story01.html   (1015 words)

  
 Hewlett-Packard Journal: New optimizations for PA-RISC compilers - Hewlett-Packard Co.'s Precision Architecture-Reduced Instruction Set Computer architecture - Technical
Hewlett-Packard's involvement in reduced instruction set computers (RISC) began in the early 1980s when a group was formed to develop a computer architecture powerful and versatile enough to excel in all of Hewlett-Packard's markets including commercial, engineering, scientific, and manufacturing.
After 18 months of iterative, measurement-oriented evaluation of what computers do during application execution, the group produced an architecture definition known today as Precision Architecture RISC, or PA-RISC.(1,2,3)
In the late 1980s, there were a number of groups that were looking for ways to make Hewlett-Packard more successful in the highly competitive workstation market.
http://www.findarticles.com/p/articles/mi_m0HPJ/is_n3_v43/ai_12226132   (1397 words)

  
 OpenBSD/hppa
Later on, Hewlett-Packard decided to sponsor a Linux port to the PA-RISC family, which actually resulted in some proprietary documentation being released, even though their target was a different class of 9000 machines back then.
One of the major direct benefits from previous porting efforts (besides the code, of course) was support for HP PA-RISC in GCC and binutils, which allowed quick building of a cross-tools environment for development.
In addition to the release, full snapshots are made periodically, and work is ongoing to provide better hardware support.
http://www.openbsd.org/hppa.html   (783 words)

  
 HP outlines plans for Alpha's retirement
Along with Alpha, which it inherited through its merger with Compaq Computer, and its own PA-RISC family, HP has also said it will retire the Tru64 Unix operating system, another Compaq leftover, and merge its best capabilities with its own HP-UX software.
The company is retiring the chip, along with its PA-RISC processors, with plans to move all its higher-end servers to Intel's 64-bit Itanium family.
After that, by around mid-2004, HP will put the Alpha family into "maintenance mode," he said, meaning HP won't develop further versions of the chip.
http://www.infoworld.com/articles/hn/xml/02/12/04/021204hnhpalpha.html?s=IDGNS   (1251 words)

  
 PA-RISC family - Wikipedia, the free encyclopedia
As the name implies, it is an implementation using a RISC design, where the PA stands for Precision Architecture.
The design is also referred to as HP/PA for Hewlett Packard Precision Architecture.
PA is considered by some to stand for Palo Alto, the location of HP's headquarters.
http://www.wikipedia.org/wiki/PA-RISC_family   (738 words)

  
 MSN Tech & Gadgets
The Intel partnership was designed so the Itanium family would be widely used, attracting widespread support from software companies and computer makers and not being consigned to the high-end boutique niche that HP's own PA-RISC chip family occupy.
While HP plans to phase out its own PA-RISC processor line two generations from now, the company's two main rivals--IBM and Sun Microsystems--have their own high-end processor lines and therefore have been insulated against the problems Itanium has had getting to market.
Early models were delayed several times, and its adoption has been slowed by the fact that the overall Itanium design forces software companies to profoundly rework products that had been tailored for Intel's Pentium and Xeon processors.
http://msn-cnet.com.com/2100-1001-984813.html   (1125 words)

  
 Dataquest : Top Stories : ITANIUM: Intel’s 64-bet
The new 64-bit HP-UX 11i OS has been rebuilt from its legacy RISC OS, and is backward compatible with older HP-UX apps.
The intermediate transition of business apps from Intel 32-bit and RISC 64-bit server platforms to IPF is not easy, nor the outcome predictable.
Moreover, shipments of RISC and Intel 32-bit server platforms will continue till 2010 and beyond with IPF servers gradually increasing their share.
http://www.dqindia.com/content/top_stories/102041601.asp   (2637 words)

  
 PARISC-LINUX: Documentation
PA8500: A 500 MHz 64 bit RISC CPU with 1.5Mbyte on chip Cache
Enabling Optimizations to Achieve Higher Performance on the HP PA-RISC Architecture.
Summary of PA-RISC architecture and implementations up to PA-8600 and features of the PA 8700 implementation.
http://parisc-linux.org/documentation   (292 words)

  
 Technology
By contrast, HP will not only adopt Itanium family chips into its machines that compete against Sun and IBM boxes, the company will also eventually insert the chip into the superhigh-end NonStop machines that it acquired in the Compaq Computer merger.
The performance of the new processor family is key for HP in particular as the company places most of its eggs in the Itanium basket.
IBM is backing Itanium but heavily investing in its own Power processors, while Sun is pushing its UltraSparc processors while grudgingly adopting low-end 32-bit Intel chips.
http://www.weeklyholiday.net/120702/tech.html   (2614 words)

  
 HP Press UK : Press releases : 2002 Archive : Infrastructure, Servers and Networking : HP Announces Powerful Upgrades to PA-RISC and AlphaServer Lines
The AlphaServer system also posted a breakthrough RISC-system price/performance figure of $9.39/tpmC, more than 39 percent lower than the previous price/performance record.(9) This result furthers HP’s dominance in the 4-way RISC computing space, in which HP’s ES45 and rp5470 servers are the two fastest servers as measured by the TPC-C Benchmark.
The entry-level rp5470 with the PA-8700+ set a world record for 4-way RISC servers for the SPECweb99_SSL benchmark,(7) outperforming the Sun v480 by a factor of two and beating the IBM p630 by a significant margin.
In addition, an HP AlphaServer ES45 system running Sybase ASE 12.5 software established a new record for four-processor RISC systems in the industry-standard TPC-C commercial benchmark, achieving 56,375 tpm/C (transactions per minute).
http://h41131.www4.hp.com/uk/en/pr/UKeng240420031831280.html   (1732 words)

  
 OpenPA: PA-RISC Processors
The PA-8000 is the first chip to implement the 64-bit PA-RISC 2.0 architecture which includes many extensions to support 64-bit computing.
Compared to other RISC architectures from that time, the original PA-RISC design was an unspectacular one; it had typically fewer features than those but remained always at competitive speeds, especially in FP areas.
This was the first PA 1.1 CPU implementation and saw its first uses in the first true PA-RISC workstations and later in some of the Nova servers.
http://www.openpa.net/cpu.html   (3045 words)

  
 IT Resource Center forums - performance of PA-RISC binaries on Itanium using Aries
Obviously it's significantly to your advantage to recompile native where you can, but in many cases an old PA binary will still give you quite reasonable performance under Aries, especially when compared to a machine like a J2240.
rx2600 (900 MHz)running a PA binary under Aries
You can test your apps on Itanium (aka IPF) by getting an account
http://forums1.itrc.hp.com/service/forums/questionanswer.do?threadId=65790   (485 words)

  
 * PA-RISC - (Computing): Definition
See also: Frames, Machine language, RISC, SPARC, X86
The fastest desktop system at any given time is typically either an Alpha or PowerPC based system, but the SPARC and PA-RISC based systems are also often in the running.
http://www.bestknows.com/computing/parisc.html   (110 words)

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