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| | PCI Express - Wikipedia, the free encyclopedia |
 | | PCI Express, or PCIe, (formerly known as 3GIO for 3rd Generation I/O, not to be mistaken for PCI-X or PXI) is an implementation of the PCI computer bus that uses existing PCI programming concepts, but bases it on a completely different and much faster serial physical-layer communications protocol. | | | As of 2005, PCI Express appears to be well on its way to becoming the new backplane standard in personal computers. | | | PCI Express slots (from top to bottom: x4, x16, x1 and x16), compared to a traditional 32-bit PCI slot (bottom), as seen on DFI's LanParty nF4 SLI-DR It is supported primarily by Intel, who started working on the standard as the Arapahoe project after pulling out of the InfiniBand system. |
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http://en.wikipedia.org/wiki/PCI_Express
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| | Serial PCI Express Bus Description, PCIe Electrical, Mechanical and Protocol |
| | Jitter in the PCI Express Interface: PCI Express specifies a maximum output jitter of 120ps for the Serializer and a minimum input jitter tolerance of 240ps for the De-serializer. | | | PCI Express was originally developed at Intel by the Arapahoe working group. | | | The PCI Express bus started showing up on Mother Boards in 2004 as an addition (using a new connector) to the PCI interface, and will coexist and out-pace parallel PCI at the rate PCI took over from the ISA bus. |
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http://www.interfacebus.com/Design_Connector_PCI_Express.html
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| | PCI Express – An Overview of the PCI Express Standard - Tutorial - Products and Services - National Instruments |
| | Initial PCI Express computers offer an x16 connector as well as some combination of x1, x4, and x8 slots, depending on the intended market for the computer. | | | The run-time software model used by PCI is a load-store, shared-memory model, which is maintained within the PCI Express architecture to enable all existing software to execute unchanged. | | | The use of different lane widths in PCI Express requires the user to be attentive to the width required by an expansion board compared and to match that to the lane width provided by the motherboard. |
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http://zone.ni.com/devzone/conceptd.nsf/webmain/70B1D3E338E6F52386256E37006DFDB3?opendocument&node=14340_us
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| | pciexpress.shtml |
| | PCI Express graphics cards won't require any programming considerations from third-party software developers. | | | Then again, the argument is hard to debate given the lack of PCI Express hardware and a general absence of software demanding enough to observe adverse amounts of latency. | | | PCI-SIG (the Peripheral Component Interconnect Special Interest Group), defines PCI Express as "...an open specification designed from the start to address the wide range of current and future system interconnect requirements of multiple market segments in the computing and communications industries. |
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http://www.hothardware.com/hh_files/S&V/pciexpress.shtml
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| | PCI Express Technology |
| | Table 2 summarizes the encoded and unencoded data rates (see sidebar, PCI Express "Coded" and "Unencoded" Bandwidth) of x1, x4, x8, and x16 implementations, which are defined in the initial generation of PCI Express. | | | Figure 12 shows how PCI Express could be implemented in a portable computer system. | | | PCI Express has "active-state" power management, which lowers power consumption when the bus is not active (that is, no data is being sent between components or peripherals). |
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http://www1.us.dell.com/content/topics/global.aspx/vectors/en/2004_pciexpress?c=us&l=en&s=corp
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| | PCI Express |
| | PCI Express is a high performance, general purpose Serial I/O Interconnect defined for a wide variety of future computing and communication platforms. | | | The basic premise of PCI Express is that the host PCI software remains compatible with an endpoint device without new drivers or operating-system software. | | | PCI Express takes advantage of recent advances in point-to-point interconnects, switch-based technology, and packetized protocol to deliver new levels of performance and features. |
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http://www.latticesemi.com/products/devtools/ip/pci_express/index.cfm
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| | 1 |
| | PCI Express-enabled motherboards are going to start becoming more and more common, and with the new bus's increasing ubiquity will come the inevitable confusion that accompanies the rise of any new technology, especially one as complex and feature-rich as PCI Express. | | | It won't happen with PCI Express, and it won't happen with Infiniband (although it technically could happen with Infiniband if we threw away all of today's PC hardware and started over from scratch with a round of natively Infiniband-compliant devices). | | | As is evident from the diagram above, the PCI bus is attached to the southbridge. |
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http://arstechnica.com/articles/paedia/hardware/pcie.ars/1
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| | Intel® Developer Network for PCI Express* Architecture - PCI Express Architecture in Communications |
| | PCI Express is a high-bandwidth, low pin count, serial, interconnect technology that also maintains software compatibility with existing PCI infrastructure, and is uniquely positioned as the logical interconnect technology for products being developed today. | | | As this common interconnect, PCI Express in communications and embedded will benefit from lower costs, a stronger ecosystem and the widespread interoperability associated with the large volumes from the compute and enterprise market segments. | | | Intel, as the number one silicon provider for both the communications/embedded, computing and enterprise industries, is committed to aligning all of our compute and communications silicon, platforms, solutions and ecosystem enabling with PCI Express. |
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http://www.intel.com/technology/pciexpress/devnet/comms.htm
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| | PCI Express: Under the Hood of 2004's New Bus |
| | Since PCI Express also doubles as a chip-to-chip link at the board level, it could theoretically be used to replace a wide range of current bus and interconnect technologies, but is being targeted at fairly specific tasks. | | | The last is important because it allows PCI Express to emulate a network environment, sending data between two compatible points, without routing it back and forth through the host chip. | | | According to Intel's and its industry-consortium partners' white papers, PCI Express is software-compatible with current operating systems, so system initialization, hardware discovery, and resource allocation should be no sweat. |
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http://www.cpuplanet.com/features/article.php/3305281
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| | -- Catalyst Enterprises, Inc. -- |
| | In the analyzer mode, the SPX is inserted between two communicating PCI Express devices, typically a root complex and an endpoint. | | | May be field-upgraded or factory-configured to include PCI Express Analyzer capabilities (see SPX-1A) or additional lane support (to x4 configurations). | | | May be field-upgraded or factory-configured to include PCI Express exerciser or additional lane support (to x4 configurations). |
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http://www.getcatalyst.com/product-pciexpress.html
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| | Intel Demonstrates Its First PCI Express*-Based Silicon |
| | More information about PCI Express technology is available at the Intel®; Developer Network for PCI Express* Architecture website, http://www.express-lane.org. | | | Intel and other companies throughout the computer and communications industries are adopting PCI Express technology as the successor to today's PCI and PCI-X architectures. | | | During keynotes at the Intel Developer Forum, Intel demonstrated for the first time its next-generation server and workstation chipsets, codenamed "Lindenhurst" and "Tumwater," respectively, and their advanced PCI Express capabilities. |
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http://developer.intel.com/pressroom/archive/releases/20030918net_a.htm
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| | PCIE analyzer, PCI-E analyzer, PCI Express analyzers, pci express protocol analyzer, pci express analyser, pci-e analysers, pcie analyser |
| | PCI Express architecture is a state-of-the-art serial interconnect technology that keeps pace with recent advances in processor and memory subsystems. | | | PCIE analyzer, PCI-E analyzer, PCI Express analyzers, pci express protocol analyzer, pci express analyser, pci-e analysers, pcie analyser | | | PETracer™ is a PCI Express x1 protocol analyzer solution which allows for capturing, processing and analyzing PCI Express traffic on a single x1 link. |
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http://www.lecroy.com/tm/Solutions/Protocol/pcie.asp?menuid=29
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| | Spode's Abode - NV45 & R423, PCI Express Testing |
| | Anyone who is considering upgrading their computer in the near future will certainly have the words "PCI Express" stuck in their mind. | | | The solution to this is PCI Express which uses a serial interface. | | | The transition to PCI Express is very similar to the one we currently making from Parallel ATA to Serial ATA hard drives. |
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http://www.spodesabode.com/content/article/pciexpress
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| | Eureka Technology - PCI Express Endpoint Controller IP core |
| | Similarly, external accesses comes from the PCI Express bus is translated into simple memory read and write accesses to the user logic. | | | PCI Express development kit available, including development board, demonstration software and device driver. | | | While one or more TLP(s) could be waiting for positive acknowledgement, one TLP could be in transmission to the PCI Express bus and one TLP could be under construction from the master user interface. |
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http://www.eurekatech.com/products/pci/ec310.htm
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| | default.aspx?PageID=5&ArticleID=86 |
| | However, in 2002 a new standard was approved called PCI Express, formally known as 3GIO (3rd Generation I/O). | | | The PCI bus is designed to connect I/O (In put/Out put) devices with the computer. | | | The PCI bus was first introduced in early 1990 to replace the then current ISA bus. |
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http://www.viaarena.com/default.aspx?PageID=5&ArticleID=86
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| | PCI Express |
| | PCI Express will instead be used to connect storage and network devices to a server. | | | In PCI Express, the memory still attaches to the processors' North Bridge, but that in turn connects to the 3GIO bus and eliminates proprietary components. | | | PCI Express, formerly codenamed 3GIO, is Intel's third-generation serial I/O bus architecture, which many hope will give data transport some extra oomph as the PCI bus runs out of steam. |
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http://www.networkworld.com/details/1661.html
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| | Pci, sis 900 pci, pci sound |
| | pcie analysers, PCIE analyzer, PCI-E analyzer, PCI Express analyzers, pci express protocol analyzer, pci express analyser, pci-e analysers, pcie analyser,... | | | PCI bus is for high speed data comm and it's a hell to implement... | | | Acromag manufactures embedded I/O bus boards for PCI computers to perform analog I/O, digital I/O, and counter/timer functions for data acquisition and... |
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http://www.yourpopmusic.com/pci.html
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| | PCI Express Technology |
| | PCI Express, as the next generation of PCI technology, serves the needs of future generation platforms. | | | With a Board of Director position on PCI-SIG (the 800+ member industry association responsible for developing and maintaining PCI Express, PCI-X and PCI I/O standards), LSI Logic is uniquely positioned to understand both customer needs and technology innovations. | | | PCI Express™ is the new industry standard I/O interconnect targeted to provide local I/O connectivity across desktop, mobile, enterprise and communications platforms while serving a wide variety of future computing, storage, and embedded applications. |
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http://www.lsilogic.com/technologies/industry_standards/pci_express_technology.html
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| | PCI Express analyzer, pcie analyzers, pci-e analyzer, pci express analyzers |
| | PCI Express root complexes or device endpoints can be emulated. | | | Together with the LeCroy PETracer expert PCI Express protocol analysis solutions, PETrainer EML reduces time-to-market by enabling users to quickly identify logic and design flaws. | | | Together with the LeCroy PETracer expert PCI Express protocol analysis solutions, PETrainer ML reduces time to market by enabling users to quickly identify logic and design flaws. |
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http://www.lecroy.com/tm/products/ProtocolAnalyzers/pcie.asp?menuid=63
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| | PCI Express |
| | VIDIA is continually working with partners to develop technologies and products that enrich your computing experience, and PCI Express is a prime example. | | | NVIDIA’s desktop, mobile, and professional PCI Express solutions deliver faster graphics and system performance for every type of computer user. | | | With a scalable bandwidth that far exceeds that of AGP 8X and PCI buses, NVIDIA’s PCI Express solutions deliver a new level of computer performance. |
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http://www.nvidia.com/page/pci_express.html
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| | PCWorld.com - GeekTech: Superfast Interface for PC Slots |
| | Today's technology lesson: The PCI Express interface and what it can (and cannot) do for you and your PC. | | | For those who haven't heard of it, the short explanation of PCI Express is that it's a new interface that can go far beyond the speed of current AGP and PCI buses. | | | Theoretically, it can boost the speed of a computer's PCI and AGP buses--and also the PCI-X bus that's mainly used in servers. |
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http://www.pcworld.com/news/article/0,aid,115397,00.asp
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| | Craig's PCI Programs |
| | AGP, Cardbus and PCI Express troubleshooting and unknown device recognition. | | | The current release version of PCI now features classic PCI Specification Version 3.0 support, including all 140 device class/subclass/programming interface codes, PCI Express support, much improved power management reporting, as well as many bug fixes and code cleanups. | | | I will, however, continue to release updated versions of PCI from time to time, whenever a bug fix or relevant new feature appear in PCI32. |
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http://members.datafast.net.au/~dft0802/downloads.htm
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| | Reaching Destination Success on the PCI Express |
| | The PCI Express design chain for the Cadence® Allegro® system interconnect design platform provides a plug-and-play environment where the performance of all silicon vendors can be compared. | | | As PCI Express becomes a widely used standard in the desktop, mobile, enterprise, and communications markets, the number of silicon devices available for use in their systems will dramatically increase, making it extremely difficult for system architects to quickly identify which vendors are meeting their system requirements. | | | This webinar will include information on how the Altera® PCI Express silicon design-in kit works with the Allegro system interconnect design platform to speed implementation of the Altera Stratix™ GX into PCI Express systems. |
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http://www.cadence.com/webinars/webinars.aspx?xml=pciExpress0504
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| | Inside PCI Express |
| | PCI Express Predictions, where we forecast whether PCI Express will assume the dominant bus/interconnect position in future PCs, workstations, and servers. | | | At Intel's Developer Forum this week, much buzz will be centered about PCI Express, previously known as "Third Generation I/O" or "3GIO." The PCI Special Interest Group (PCI-SIG) recently anointed PCI Express as the successor to PCI -- which means big changes ahead in computer design and architecture. | | | However, you need to understand the proposed capabilities and positioning of PCI Express now, to effectively plan your long-range system building and purchasing decisions. |
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http://www.extremetech.com/article2/0,3973,522663,00.asp
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| | Howstuffworks "How PCI Express Works" |
| | We'll also look at how PCI Express makes a computer faster, can potentially add graphics performance, and can replace the AGP slot. | | | A new protocol called PCI Express (PCIe) eliminates a lot of these shortcomings, provides more bandwidth and is compatible with existing operating systems. | | | Peripheral Component Interconnect (PCI) slots are such an integral part of a computer's architecture that most people take them for granted. |
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http://computer.howstuffworks.com/pci-express.htm
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| | Intel® Developer Network for PCI Express* Architecture |
| | The PCI Express Solutions Catalog enables you to make the industry connections you need and provide fast access to Intel building blocks, third-party tools, and product information. | | | If your business develops solutions utilizing new and exciting innovations in technology, the PCI Express* Architecture can now help you get there, faster and easier than before. | | | As a member, you get the latest news and information on PCI Express and advance notice about educational events like Webcasts. |
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http://www.intel.com/technology/pciexpress/devnet
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| | V I P E R L A I R .com - PCI Express Primer |
| | PCI-Express can transmit 100MB per second per pin. | | | V I P E R L A I R.com - PCI Express Primer | | | PCI (Peripheral Component Interconnect) was originally developed by Intel Corporation, but is now slowly coming to an end, by slow I mean it wont be discarded for a couple of years yet. |
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http://www.viperlair.com/articles/editorials/pcie
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| | Hexapedia - PCI-Express |
| | PCI-Express (formerly known as 3GIO for 3rd Generation I/O) is a new implementation of the PCI computer bus that uses existing PCI programming concepts and communications standards, but bases it on a much faster serial communications system. | | | Due to it being based on the existing PCI system, cards and systems can be converted to PCI-Express by changing the physical layer only – existing systems could be re-booted on PCI-Express and never even know it. | | | PCI Express is specified for regular cards, low height cards, miniExpress cards, ExpressCards (PCMCIA form factor) and AdvancedTCA (a replacement for CompactPCI) |
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http://www.hexafind.com/encyclopedia/PCI_Express
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| | PCWorld.com - GeekTech: Picking Your Perfect PCI Express PC |
| | Unfortunately, some vendors make it hard to figure out if the computer you're considering has PCI Express. | | | Bottom line: If PCI Express is important to you, and you're not sure whether a particular PC has it, get on the phone and ask someone before you buy. | | | Intel has been shipping its PCI Express-based 925, 915P, and 915G chip sets for some time now, and there are a plethora of motherboards and systems now using them. |
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http://www.pcworld.com/news/article/0,aid,118026,00.asp
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