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| | <b>Reedb>-<b>Solomonb> error correction - Wikipedia, the free encyclopedia |
 | | If the locations of the errored symbols are not known in advance, then a <b>Reedb>-<b>Solomonb> code can correct up to (n−k)/2 errored symbols, i.e., it can correct half as many errors as there are redundant symbols added to the block. |  | | <b>Reedb>-<b>Solomonb> error correction is a coding scheme which works by first constructing a polynomial from the data symbols to be transmitted and then sending an over-sampled plot of the polynomial instead of the original symbols themselves. |  | | A <b>Reedb>-<b>Solomonb> code is twice as powerful at erasure correction than at error correction, and any combination of errors and erasures can be corrected as long as the equation 2E + S ≤ (n−k) is satisfied, where E is the number of errors and S is the number of erasures in the block. |
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http://en.wikipedia.org/wiki/Reed-Solomon_code
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| | World Intellectual Property Organization |
 | | A <b>Reedb> <b>Solomonb> (R-S) decoder is presented herein as a paradigm for an error correcting decoder that utilizes an iterative polynomial evaluation to determine whether particular values are roots of the given polynomial. |  | | The decoder (500) of claim 7, wherein each error magnitude of the plurality of error magnitudes (331, 341, 351, 361) is based on a sum of a-product term from a corresponding coefficient multiplier (325a-d) in each slice element (320) of the plurality of slice elements (320, 320') in the second evaluator (300). |  | | For each error that the error locator 130 locates, an error corrector 150 determines the corrected codeword c (x) 151, based on the location 131 and magnitude 141 of this error. |
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http://www.wipo.int/ipdl/IPDL-CIMAGES/view/pct/getbykey5?KEY=01/39378.010531&ELEMENT_SET=DECL
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| | ECC Technologies, Inc. ECC FAQs |
 | | Error correction is the process of detecting bit errors and correcting them and can be done in software or hardware. |  | | Error correction is currently being used to make high capacity storage devices such as magnetic and optical disk and tape reliable. |  | | Error correction can either be done in hardware or software depending upon how fast it has to be done. |
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http://members.aol.com/mnecctek/faqs.html
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| | TRL News |
 | | The new IBM algorithm opens up a whole new range of applications for <b>Reedb>-<b>Solomonb> error correction by speeding it up to a level comparable with that of Hamming code error correction. |  | | Designed to correct an error in a sequence of bits (a "symbol"), <b>Reedb>-<b>Solomonb> error-correcting codes can correct an error in up to eight consecutive bits with single-symbol correction capability, provided a symbol consists of eight bits. |  | | These error-correcting codes were announced in 1960 in a paper by Irving S. <b>Reedb> and Gustave <b>Solomonb>. |
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http://www.research.ibm.com/trl/news/lead_rs_e.htm
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| | Fault tolerant memory using bus bit aligned <b>Reedb>-<b>Solomonb> error correction code symbols - Patent 5313464 |
 | | A 640 byte data block comprising 512 ten-bit symbols using the <b>Reedb>-<b>Solomonb> error correction code is stored in twenty byte groups of each of thirty-two eight-bit by 128 kilobyte static RAM devices. |  | | The ten-bit <b>Reedb>-<b>Solomonb> error correction code symbols are data bus bit aligned in each of a plurality of RAM devices and distributed among the plurality of RAM devices. |  | | A data converter converts the ten-bit <b>Reedb>-<b>Solomonb> error correction code symbols so that they are conveyable via two eight bit buses or a sixteen-bit bus, with all of the ten bits of each ten-bit symbol being conveyable via one of the sixteen bits of the bus. |
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http://www.freepatentsonline.com/5313464.html
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| | <b>reedb>-<b>solomonb> codes |
 | | <b>Reedb>-<b>Solomonb> codes are particularly well suited to correcting burst errors (where a series of bits in the codeword are received in error). |  | | The advantage of using <b>Reedb>-<b>Solomonb> codes is that the probability of an error remaining in the decoded data is (usually) much lower than the probability of an error if <b>Reedb>-<b>Solomonb> is not used. |  | | <b>Reedb> <b>Solomonb> codes are a subset of BCH codes and are linear block codes. |
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http://www.4i2i.com/reed_solomon_codes.htm
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| | The Ubiquitous <b>Reedb>-<b>Solomonb> Codes |
 | | <b>Reedb> was among the first to recognize the significance of abstract algebra as the basis for error-correcting codes. |  | | But that kind of brute-force error correction would defeat the purpose of high-speed, high-density information processing. |  | | <b>Reedb>, now a professor of electrical engineering at the University of Southern California, is still working on problems in coding theory. |
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http://www.siam.org/siamnews/mtc/mtc193.htm
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| | Technology Mammoth Advanced Error Correction - Exabyte |
 | | To deal with these errors, digital information scientists have devised various schemes for embedding error correction information within the data. |  | | Careful engineering can reduce the error rate resulting from misinterpreted information to a seemingly negligible level, but given the vast volume of data typically being being backed up in companies today, that negligible level is a daily invitation to disaster. |  | | ECC3 is used only when a data error cannot be corrected by ECC1 and ECC2. |
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http://www.exabyte.com/technology/mammoth/intro/errorcorrection.cfm
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| | PDF417 Barcode FAQ and Tutorial |
 | | It is necessary to use the encoder because of the complexity of the symbology and the required <b>Reedb> <b>Solomonb> error correction. |  | | The <b>Reedb> <b>Solomonb> error correction can add significantly to the size of the PDF417 barcode, but this is usually not a problem, because the barcode is two-dimensional, multi-row and can be printed at very small x dimensions. |  | | The error correction level depends on the amount of data that needs to be encoded, the size, and the amount of symbol damage that could occur. |
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http://www.idautomation.com/pdf417faq.html
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| | SourceForge: Welcome |
 | | The RSCODE project is an implementation of a <b>Reedb>-<b>Solomonb> error correction algorithm. |  | | This implementation of the <b>Reedb>-<b>Solomonb> codes provide convenient 'byte-sized' block coding which is convenient for adding protection to data which is stored as eight-bit bytes (i.e., most common computer data). |  | | Error correcting codes are marvelous jewels of mathematics and algorithms, providing an almost supernatural ability to recover good data from a corrupted channel. |
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http://rscode.sourceforge.net
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| | Defeating Audio Cd Copy Protection [1/1] |
 | | I will list several web pages that can be studied so that the <b>Solomonb>-<b>Reedb> error correction is fully understood. |  | | The error correction in normal Cd players corrects these errors by interpolating the data using the data before & after the moment of error or noise. |  | | BLER (Block Error Rate) measures the number of blocks of data per second that have one occurrence of un corrected data. |
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http://www.cdfreaks.com/document.php3?Doc=49
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| | DDJ - January 1997 |
 | | For any number of reasons, <b>Reedb>-<b>Solomonb> error correction is commonly implemented in hardware. |  | | Here, Hugo presents a highly optimized software implementation of <b>Reedb>-<b>Solomonb> error correction, written in C++ and assembly language. |  | | Mark examines zlib, a library of C routines that can be used to compress or expand files using the same deflate algorithm popularized by PKZIP 2.0. |
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http://www.cs.ubc.ca/local/reading/proceedings/ddj/2000_06/articles/1997/9701/9701toc.htm
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| | Modified <b>Reedb>-<b>Solomonb> error correction system using (W+i+1)-bit representations of symbols of GF(2w+i) - US Patent 5948117 |
 | | Again, the modified pseudo data bytes and the remaining 8 bits of the ECC symbols contain all the information necessary to allow the decoding and error correction of the code word as bytes. |  | | To prevent this "miscorrection" a separate error detection code, or cross-check, is typically used to ensure that the modifications made using the interleaved error correction code produce the correct data symbols. |  | | During decoding any errors in the data are detected and, if possible, corrected through manipulation of the ECC symbols For a detailed description of decoding see Peterson and Weldon, Error Correction Codes, 2d Edition, MIT Press, 1972!. |
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http://www.patentstorm.us/patents/5948117.html
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| | Memory Error Correction - Hamming vs <b>Reedb>-<b>Solomonb> Codes - White Paper |
 | | errors in main memory, and <b>Reedb>-<b>Solomonb> codes to correct errors in peripheral devices such as tape and |  | | For those interested in obtaining more details about Imperial Technology’s use of <b>Reedb>-<b>Solomonb> error |  | | Single-bit error correction using a Hamming code is not a viable solution without |
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http://www.imperialtechnology.com/technology_whitepapers_ecc.htm
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| | ECC Technologies' Byte-Parallel <b>Reedb>-<b>Solomonb> ECC |
 | | <b>Reedb>-<b>Solomonb> codes are optimal from the standpoint of having the most error correction power for a given amount of redundancy. |  | | Our aim is to provide a generic pattern for the design of parallelized and pipelined <b>Reedb>-<b>Solomonb> encoders and decoders so that, given one level of error correction capability, the design of other implementations to correct more or fewer errors is readily apparent. |  | | The advantages of our byte-parallel <b>Reedb>-<b>Solomonb> error correcting system are as follows: |
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http://members.aol.com/mnecctek/prs.html
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| | IT Production Services |
 | | There are two types of Data Matrix symbology: ECC 000-140 with several available levels of convolutional error correction and ECC 200, which uses <b>Reedb>-<b>Solomonb> error correction. |
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http://www.ics.uci.edu/~pederson/docs/2dbarcode.html
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| | U.S. Pregrant 20030192007 - Code-programmable field-programmable architecturally-systolic <b>Reedb>-<b>Solomonb> BCH error correction decoder integrated circuit and error correction decoding method |
 | | A simplified Chien-Forney algorithm is implemented that requires fewer computations to determine error magnitudes for <b>Reedb>-<b>Solomonb> codes with offsets compared to conventional approaches, and which allows the same circuitry to be used for different codes with arbitrary offsets. |  | | A programmable error-correction decoder embodied in an integrated circuit and error correction decoding method that performs high-speed error correction for digital communication channels and digital data storage applications. |  | | Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes |
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http://cxp.paterra.com/uspregrant20030192007.html
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| | <b>Reedb> <b>Solomonb> Codes: Sofware and Hardware from 4i2i |
 | | These highly optimized software libraries support rapid encoding and decoding of the widely used <b>Reedb>-<b>Solomonb> Error Correcting Codes. |  | | <b>Reedb>-<b>Solomonb> codes are block-based error correcting codes with a wide range of applications including: |  | | The RSDecoder function takes as its input a received codeword of n symbols and returns k decoded data symbols, together with a count of the number of symbol errors corrected (or a flag indicating that more than t errors were present). |
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http://www.4i2i.com/reed_solomon_software.htm
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| | Algorithms in the Real World: Error Correcting Codes |
 | | A very brief Understanding <b>Reedb>-<b>Solomonb> Error Correction from Multimedia Systems Design Magazine. |  | | <b>Reedb> <b>Solomonb> Codes explained by 4i2i a company that "designs algorithms, components and systems for the communications industry." Here is a local copy. |  | | Error Correcting Codes lecture notes by Jim Carlson at the University of Utah. |
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http://www-2.cs.cmu.edu/afs/cs.cmu.edu/project/pscico-guyb/realworld/www/errorcorrecting.html
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| | Radio Design Group - RS-FEC <b>Reedb>-<b>Solomonb> Software |
 | | As an example: using an interleave factor of 8, a 16 symbol correction code can be constructed that would permit correction of error rates up to 1% or burst errors as long as 1017 bits. |  | | RS-FEC is a robust symbol oriented error correction coding system. |  | | This coding system provides superior burst error correcting capability while maintaining an excellent ability to correct random errors. |
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http://www.radiodesign.com/rs_sale.htm
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| | AIM - The global trade assocation for automatic identification |
 | | Selectable error correction levels: 4 levels of <b>Reedb>-<b>Solomonb> error correction, plus one for error detection only. |  | | The Ultracode two-dimensional linear matrix symbology has a constant number of rows and uses <b>Reedb>-<b>Solomonb> error correction. |  | | Code type: Constant height two-dimensional matrix; length dependent on amount of data encoded and error correction level in use. |
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http://www.aimglobal.org/standards/symbinfo/ultracode_overview.asp
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| | The Error Correcting Codes (ECC) Page |
 | | This page contains several computer programs, written in C/C++ language (and some Matlab scripts), that implement encoding and decoding routines of popular error correcting codes (ECC), such as <b>Reedb>-<b>Solomonb> codes, BCH codes, the binary Golay code, a binary Goppa code, a Viterbi decoder and more. |  | | Decoding the Berlekamp-Masssey (BM) algorithm, with error evaluation as explained in Lin and Costello's book. |  | | The purpose of this tutorial is to introduce the reader to a forward error correction technique known as convolutional coding with Viterbi decoding. |
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http://www.eccpage.com
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| | Monarch Frame Sync [PCI] / Telemetry & Command / Products / Avtec.com - the Web site of Avtec Systems, Inc. |
 | | The Monarch-E <b>Reedb>-<b>Solomonb> Error Correction chip accepts parallel data from the board's Serial Input Logic. |  | | The board's integrated <b>Reedb>-<b>Solomonb> Encoder and Decoder provide complete block error detection and correction for each of the CCSDS-recommended grades of service for Advanced Orbiting Systems. |  | | It performs RS (255,223) VCDU error correction with interleaving depth from 1 to 8, RS (10,6) VCDU header error correction, and real-time quality generation and annotation. |
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http://www.avtec.com/content/view/full/205
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| | CSD - May 1999 - Building Blocks: <b>Reedb>-<b>Solomonb> from the Ground Up. |
 | | As error correction methods move completely into the mainstream in modern communications, everyone keeps mentioning these <b>Reedb> and <b>Solomonb> fellows. |  | | The example shown in Figure 1 is one in which bursts of errors are likely. |  | | For CRC-7, the correctable percentage for a length of eight errors is about 99.4%, and above 99% for lengths greater than eight errors. |
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http://www.commsdesign.com/main/1999/05/9905building.htm
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| | 12.5 MBytes/sec <b>Reedb>-<b>Solomonb> Error Correction IC |
 | | The AHA4013 is a member of the AHA PerFEC high performance, single-chip <b>Reedb>-<b>Solomonb> Forward Error Correction (FEC) devices. |  | | AHA4013B Specification - 12.5 MBytes/sec <b>Reedb>-<b>Solomonb> Error Correction IC |  | | AHA4013B Brief - 12.5 MBytes/sec <b>Reedb>-<b>Solomonb> Error Correction IC |
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http://www.aha.com/show_prod.php?id=16
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| | Forward Error Correction |
 | | It is based on <b>Reedb>-<b>Solomonb> coding and it must be implemented. |  | | Forward Error Correction (FEC) is used to assure optimal performance. |  | | The interleaving depth values are either 16, 32 or 64 (32 or 64 for 2.048 Mbit/s based systems). |
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http://www.cs.tut.fi/tlt/stuff/adsl/node12.html
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| | <b>Reedb>-<b>Solomonb> Encoder |
 | | <b>Reedb>-<b>Solomonb> error correction coding techniques are employed on the 188-byte MTS packets, with the capability to correct eight errors per transport packet. |  | | > Products > Intellectual Property > DSP > Error Detection/Correction > <b>Reedb>-<b>Solomonb> Encoder |  | | Configurable solution for high data rate <b>Reedb>-<b>Solomonb> encoding |
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http://www.altera.com/products/ip/dsp/error_detection_correction/m-amp-rs-enc.html
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| | Byte-parallel system for implementing <b>reedb>-<b>solomonb> error-correcting codes (US5754563) |
 | | Decoding is accomplished with or without byte failure location information by multiplying the received word by an error detection matrix, solving the key equation and generating the most-likely error word and code word in a parallel and pipelined fashion. |  | | Syndrome processing unit for multibyte error correcting systems |  | | Parallelizing and pipelining allows inputs to be received at very high (fiber optic) rates and outputs to be delivered at correspondingly high rates with minimum delay. |
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http://www.delphion.com/details?pn%3DUS05754563__
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