|
| Â Â |
| Â | Speculative execution |
 | | In computer science speculative execution is the execution of code whose result may not actually be In the context of functional programming the term "speculative evaluation" is used | | | It is useful only when early consumes less time and space than later would and the savings are enough to in the long run for the possible effort of computing a value which is used. | | | The early evaluation is often cheaper values needed for the computation are likely be available on the stack and need not be stored and retrieved from the heap. |
|
http://www.freeglossary.com/Speculative_execution
|
|
| Â Â |
| Â | Disjoint Eager Execution: An Optimal Form of Speculative Execution - Uht, Sindagi, Hall (ResearchIndex) |
| | Traditional speculative code execution is the execution of code down one path of a branch (branch prediction) or both paths of a branch (eager execution), before the condition of the branch has been evaluated, thereby executing code ahead of time, and improving performance. | | | executes the path that is the most likely to be correct out of Mispredicted Cycles Wasted 1 Incorrect Paths Correct Branch1 Reclaimed 1... | | | Abstract: Instruction Level Parallelism (ILP) speedups of an order-of-magnitude or greater may be possible using the techniques described herein. |
|
http://citeseer.nj.nec.com/uht95disjoint.html
|
|
| Â Â |
| Â | BYTE.com |
| | This is important because loads account for about 20 percent of all instructions, and the speculative execution of other instructions will screech to a halt if they depend on data that isn't available yet. | | | More complex floating-point instructions that are computed iteratively may consume numerous cycles. | | | It supports out-of-order execution, branch prediction up to four levels deep, speculative execution, and dynamic-register renaming. |
|
http://www.byte.com/art/9411/sec8/art6.htm
|
|
| Â Â |
| Â | Speculative Execution based on Value Prediction - Gabbay, Mendelson (ResearchIndex) |
| | The new approach termed value prediction suggests to predict outcome values of operations before they are executed and supply the predicted values to true-data dependent operations. | | | As a result, the processor can speculatively execute the true-data dependent operations in parallel and extract instruction-level... | | | Speculative Execution based on Value Prediction - Gabbay, Mendelson (ResearchIndex) |
|
http://citeseer.nj.nec.com/gabbay96speculative.html
|
|
| Â Â |
| Â | Data and Control Speculative Execution |
| | Speculation is achieved by treating blocks as independent entities and activating blocks at the same level of the tree in parallel. | | | Once the input dependencies have been resolved the instruction is executed, possibly out-of-order with respect to the programmed order of other instructions in the buffer. | | | The speculative execution of the BCD addition completed its computation in nine steps. |
|
http://www.cs.waikato.ac.nz/timewarp/wengine/papers/gc99_1/
|
|
| Â Â |
| Â | TORCH Architectural Specification |
| | However, the overhead and complexity of speculative computation in compilers has prevented efficient parallelization of non-numerical code. | | | Thus, speculative execution, the execution of operations before previous branches, is an important source of parallelism in this type of code. | | | If the next branch does not follow the predicted path then the boosted instruction should never have been executed and the "boosted exception" must be ignored (in fact, this case occurs frequently during the last iteration of a tightly-coded loop which traverses a linked list). |
|
http://www-flash.stanford.edu/torch/torchspec
|
|
| Â Â |
| Â | Just Too Good - Darren's IT / Hardware Technical Resource |
| | One solution to this problem is to use speculative execution. | | | It simply executes the instruction that it predicts will be the correct one. | | | The binary decision is shown in black to illustrate that the code execution either branches back to the top of loop or it continues with the rest of remaining code. |
|
http://www.just2good.co.uk/cpuOptStrategy3.htm
|
|
| Â Â |
| Â | Pentium 4 Performance Preview |
| | With speculative execution, the processor executes the instructions in the most efficient way possible, while looking ahead for more work to perform. | | | On previous processors, if the branch instruction was mis-predicted, the processor had to start from the top, including fetching and re-decoding the x86 instructions. | | | Instead of containing the instructions themselves, the execution trace cache contains the decoded instructions, known as micro-operations (or micro-ops). |
|
http://www.firingsquad.com/hardware/p4preview/page3.asp
|
|
| Â Â |
| Â | Toggit Certification Home for MCSE CCNA A+ study guides and test prep |
| | A language used to write a program that the computer can execute. | | | The Pentium Pro is optimized for the execution of 32-bit software and is available with clock speeds from 150 to 200MHz. | | | Dynamic execution (a combination of branch prediction and speculative execution) allows the processor to anticipate and schedule the next instructions for execution. |
|
http://www.toggit.com/Library/pedia/techno.asp?Term=p&Techno=Letter
|
|
| Â Â |
| Â | Cluster Computing |
| | The focus of this research is on developing innovative mechanisms and policies that will allow software Distributed Shared Memory (DSM) systems to analyze and exploit the nature and magnitude of value locality in parallel computation. | | | With speculative execution capability, software DSM can better tolerate and even exploit the differences of communication latencies between accessing local and remote memory. | | | The goal is to minimize (or eliminate, if possible) the negative impacts of non-dedicated network environments and high network latencies on software DSM performance through the support of speculative execution and value prediction. |
|
http://www.cs.unr.edu/hpc/sdsm
|
|
| Â Â |
| Â | Future Branches -- Beyond Speculative Execution - Appelbe, Doddapaneni, Harmon, May, Wills, Vitale (ResearchIndex) |
| | Speculative execution increases hardware cost, since speculative instructions must be cleanly aborted if the branch is mis-predicted. | | | When conditional branches are encountered in a program, the instruction fetch unit must rapidly predict the branch predicate and begin speculatively fetching instructions with no loss of instruction throughput. | | | 0.1 : Instruction Fetch Mechanisms for Multipath Execution Processors - Klauser, Grunwald (1999) |
|
http://citeseer.ist.psu.edu/124859.html
|
|
| Â Â |
| Â | Publications |
| | Hwu, "Speculative Execution and Compiler-Assisted Multiple Instruction Recovery," in Foundations of Dependable Computing: System Implementation, Koob, Lau (editors), Kluwer Academic Publishers: Boston, 1994. | | | Hwu, "Application of Compiler-Assisted Rollback Recovery to Speculative Execution Repair," Hardware and Software Architectures for Fault Tolerance, Lecture Notes in Computer Science, Banatre, Lee (editors), Springer-Verlag: New York, 1994. | | | Stunkel, W. Fuchs, "TRAPEDS: Producing Traces for Multicomputers Via Execution Driven Simulation," Proceedings of the ACM SIGMETRICS- International Conference on Measurement and Modeling of Computer Systems, May 1989, pp. |
|
http://composer.ecn.purdue.edu/~fuchs/fuchs/fuchspub.html
|
|
| Â Â |
| Â | Patent 5454117: Configurable branch prediction for a processor performing speculative execution |
| | In machines performing speculative execution, branch prediction hardware must be designed to account for the possibility that a branch will be resolved as mispredicted. | | | While opcode information is used to address different sets of history information, the prediction hardware and algorithm themselves are invariant with instruction execution. | | | Pipeline processors decompose the execution of instructions into multiple successive stages, such as fetch, decode, and execute. |
|
http://www.freepatentsonline.com/5454117.html
|
|
| Â Â |
| Â | Speculative execution |
| | Figure 1 illustrates how this approach could deliver substantial performance improvements for a hypothetical application that accesses four non-resident data pages spread across three disks. | | | For example, it will offer no benefit on systems where CPU, memory or disk are already fully utilized. | | | (B) shows how execution might proceed for the application with the speculative execution approach. |
|
http://www.cs.duke.edu/csl/usenix/03usenix/proceedings/fraser/fraser_html/node3.html
|
|
| Â Â |
| Â | Irisa : thèse proposée pour la rentrée 2001 |
| | The path for higher performance using current ISAs seems to be more and more speculative execution (branches, memory dependencies, data,..). | | | IA 64 implements new concepts (at least for general purpose computing) for speculative execution (predicated execution and advanced loads). | | | On the other hand, support for part of this speculative execution can be provided by the ISA as in the new EPIC instruction set IA64 from Intel/HP. |
|
http://www.irisa.fr/theses2001/caps1.htm
|
|
| Â Â |
| Â | SpecHint |
| | We designed a method for transforming application binaries to employ the speculative execution approach using only simple, generic static analyses and transformations. | | | With our current implementations, for example, the mean performance improvement with our automatic approach is 47%, 78% and 82% in 1, 2 and 4-disk configurations, respectively, of the mean performance improvement when the applications were manually modified to issue hints. | | | We suggest that we can decrease speculative execution's sensitivity to these factors by making speculation self-aware through a combination of more sophisticated static and dynamic analyses. |
|
http://www.pdl.cmu.edu/TIP/spechint.html
|
|
| Â Â |
| Â | Optimization (computer science) |
| | For example, if it were reasonable to assume the program does not need to handle more than (say) 100 items of input, one could use static rather than dynamic memory allocation. | | | This will usually require a tradeoff — where one is optimized at the expense of others. | | | Optimization will generally focus on one or two of execution time, memory usage, disk space, bandwidth or some other resource. |
|
http://www.sciencedaily.com/encyclopedia/optimization__computer_science_
|
|
| Â Â |
| Â | Speculative Execution |
| | Our simulations of speculative execution use static branch predictions based on profile information. | | | The simulator for the SP machine simply remembers the execution time of the most recent mispredicted branch, and no subsequent instructions in the trace can execute before that time. | | | For the SP-CD and SP-CD-MF machines, an instruction must wait for its last mispredicted control dependence branch. |
|
http://suif.stanford.edu/papers/lam92/subsubsection3_4_4_2.html
|
|
| Â Â |
| Â | The Stanford SUIF Compiler Group - Speculative Execution |
| | To develop the next-generation computer architecture that exploits speculative thread level parallelism. | | | Demonstrated that the combination of loop and procedure speculatinog with value prediction to be effective across a set of integer applications. | | | The Stanford SUIF Compiler Group - Speculative Execution |
|
http://suif.stanford.edu/research/speculate.html
|
|
| Â Â |
| Â | Instruction Cache Fetch Policies for Speculative Execution |
| | The efficient use of these resources requires speculative execution, a technique whereby the processor continues executing the predicted path of a branch before the branch condition is resolved. | | | In this paper, we investigate the implications of speculative execution on instruction cache performance. | | | We test these policies and their interaction with nextline prefetching by simulating the effects on instruction caches with varying architectural parameters. |
|
http://cseclassic.ucsd.edu/~calder/abstracts/ISCA-95-Spec.html
|
|
| Â Â |
| Â | doc |
| | Furthermore, we propose hardware support that handles true memory dependence violations when the application is run in a speculative execution mode. | | | We show how the software-hardware approach enables effective speculative execution of a sequential binary on a CMP architecture without source re-compilation. | | | Hardware and Software Support for Speculative Execution of Sequential Binaries on a Chip-Multiprocessor |
|
http://iacoma.cs.uiuc.edu/multithreading
|
|
| Â Â |
| Â | Using Speculative Execution to Automatically Hide I/O Latency - Chang (ResearchIndex) |
| | This trend is causing applications that must fetch data from disk to spend an increasing proportion of their execution times stalled on disk I/O. I/O prefetching, a well-known technique for hiding disk latency, has the potential to alleviate this problem, particularly when the data that needs to be fetched is distributed across multiple disks. | | | 20 Instrumentation and optimization WinIntel executable using E.. | | | 160 EEL: Machine-independent executable editing (context) - Larus, Schnarr - 1995 |
|
http://citeseer.ist.psu.edu/563462.html
|
|
| Â Â |
| Â | Speculative Processors |
| | The interest of this project is to research on novel micro-architectural paradigms that can boost the performance limits of current dynamically-secheduled processors. | | | "Limits of Instruction Level Parallelism with Data Speculation" | | | "Control and Data Dependence Speculation in Multithreaded Processors" |
|
http://people.ac.upc.es/antonio/specula.html
|
|
| Â Â |
| Â | speculative execution - OneLook Dictionary Search |
| | speculative execution : Free On-line Dictionary of Computing [ home, info ] | | | speculative execution : Dictionary of Computing and Digital Media [ home, info ] | | | Tip: Click on the first link on a line below to go directly to a page where "speculative execution" is defined. |
|
http://www.onelook.com/cgi-bin/cgiwrap/bware/dofind.cgi?word=speculative+execution
|
|
| Â Â |
| Â | Memory Dependence Speculation Resources |
| | Jeffery Oplinger, David Heine, Shih-Wei Liao, Basem A. Nayfeh, Monica S. Lam and Kunle Olukotun, Software and Hardware for Exploiting Speculative Parallelism with a Multiprocessor, Stanford University Computer Systems Lab Technical Report CSL-TR-97-715, February 1997. | | | Venkata Krishnan and Josep Torrellas, Hardware and Software Support for Speculative Execution of Sequential Binaries on a Chip-Multiprocessor, | | | Ye Zhang, Lawrence Rauchwerger, and Josep Torrellas, Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors, |
|
http://www.cag.lcs.mit.edu/~mfrank/collect/ARB/
|
|
| Â Â |
| Â | Speculative Execution |
| | If the prediction is wrong, any instructions executed down the incorrect path must be canceled. | | | The R10000 CPU predicts which way a branch will go and executes instructions speculatively along that path. | | | The R10000 can speculate on the direction of branches nested four deep. |
|
http://www.cs.utk.edu/~dongarra/WEB-PAGES/perf_opt1/sld022.htm
|
|
| Â Â |
| Â | Smith, Justin David (2003-05-30) Fault Tolerance using Whole-Process Migration and Speculative Execution. ... |
| | New language primitives are introduced for whole-process migration, which allows an active process to be transferred from one machine to another, and speculative execution, which enables optimistic computing based on an unverified assumption. | | | This thesis examines programming language concepts that facilitate fault-tolerant distributed programming. | | | The primitives are implemented as part of a functional intermediate language in the Mojave compiler, which has a formal operational semantics and complete typing rules. |
|
http://resolver.caltech.edu/CaltechETD:etd-05272003-120725
|
|
| Â Â |
| Â | Speculative Execution |
| | Look ahead of the program counter and executing instruction that are likely to be needed. | | | Speculative Execution look ahead of the program counter and executes the instruction that are likely to be needed. |
|
http://carbon.cudenver.edu/~jcha/5593pres/tsld016.htm
|
|
| Â Â |
| Â | DBLP: Greg Barish |
| | José Luis Ambite, Greg Barish, Craig A. Knoblock, Maria Muslea, Jean Oh, Steven Minton : Getting from Here to There: Interactive Planning and Agent Execution for Optimizing Travel. | | | Cyrus Shahabi, Greg Barish, Brian Ellenberger, Mohammad R. Kolahdouzan, Ning Jiang, Seong-Rim Nam, Roger Zimmerman : Immersidata Management: Challenges in Management of Data Generated within an Immersive Environment. | | | Greg Barish, Dan DiPasquo, Craig A. Knoblock, Steven Minton : Dataflow plan execution for software agents. |
|
http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/b/Barish:Greg.html
|
|
| Â Â |
| Â | EE Times UK - GeodeLink architecture speculative execution gives priority link for Internet devices |
| | The company's approach builds on the idea of instruction re-ordering and speculative execution in processor architectures to allow data to be re-ordered based on priorities. | | | The interface unit speculatively arbitrates the packets on to the bus based on the priority and destination of the previous packet. | | | The GeodeLink architecture acts as a non-blocking crosspoint switch, but is built of a network of interface units that are connected to each other using a 64bit bus running at 266MHz, supporting data rates of 2Gbit/s in each direction. |
|
http://www.eetuk.com/tech/news/OEG20010621S0027
|
|
| Â Â |
| Â | speculative execution from FOLDOC |
| | < processor > A technique allows a superscalar processor to keep its functional units as busy as possible by executing instructions before it is known that they will be needed. | | | Nearby terms: Spectral Band Replication « Spectrum « speculative evaluation « speculative execution » Speech Application Programming Interface » speech recognition » Speech Recognition Application Program Interface |
|
http://foldoc.doc.ic.ac.uk/foldoc/foldoc.cgi?speculative+execution
|
|
| Â Â |
| Â | USENIX Annual Technical Conference 2003, General Track - Abstract |
| | Not only is our system easier to implement and deploy, but by handling page faults as well as traditional file-access methods we are able to apply speculative execution to swapping applications, which often spend the majority of their execution time fetching non-resident pages. | | | By placing our design within the operating system, we provide several benefits compared to the previous application-level design. | | | Our results show that our support mechanisms for swapping applications provide significant performance benefits, and in some cases prevent speculative execution from hurting performance. |
|
http://www.usenix.org/events/usenix03/tech/fraser.html
|
|
| Â Â |
| Â | Unlimited Speculative Execution for Loops |
| | A task level speculative execution scheme, called the "Unlimited Speculative Execution", is adopted on the loops that are not able to be parallelized because of memory ambiguation or control dependences. | | | In this paper, loops are classified into nine categories to make clear the applicable loops for the scheme. | | | This paper discusses how to adopt the "Unlimited Speculative Execution" on loops. |
|
http://www.ipsj.or.jp/members/SIGNotes/Eng/08/2000/139/article028.html
|
|
| Â Â |
| Â | Multi-path Speculative Execution Model with Program-counter Queues |
| | Multi-path is the execution of code from both pathes of a branch before the condition of the branch has been evaluated. | | | We describe the results that we simulate the model in the following case; the relationship between the number of function unit resources and performance, the number of groups which execute branch-path codes concurrently in this model. | | | In this paper, we propose multi-path speculative execution model with program counter queues. |
|
http://www.ipsj.or.jp/members/SIGNotes/Eng/08/2000/139/article030.html
|
|
| Â Â |
| Â | SGI TPL (Hardware: Developer/R10K_UM ) |
| | A.7 - Instruction Fetch, Decode, Issue, Execution, Completion, and Graduation | | | Speculative Processor Block Read Request to an I/O Address | | | Unexpected Write Back Due to Speculative Store Instruction |
|
http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_4.html
|
|
| Â Â |
| Â | Using speculative execution for fault tolerance in a real-time system |
| | Index Terms- real-time systems; fault tolerant computing; program compilers; speculative execution; fault tolerance; real-time system; primary-backup approach; timeliness properties; compiler; simulation results | | | Achieving fault-tolerance using a primary-backup approach involves overhead of recovery such as activating the backup and propagating execution states, which may affect the timeliness properties of real-time systems. | | | Simulation results are reported to show the contribution of speculative execution under the proposed architecture. |
|
http://csdl.computer.org/comp/proceedings/iceccs/1995/7123/00/71230349abs.htm
|
|
| Â Â |
| Â | IP.com's Prior Art Database |
| | Minimizing the latency of floating-point operations by speculative execution of fused multiply-add instructions | | | This text was extracted from a PDF file. |
|
http://www.priorartdatabase.com/IPCOM/000016381/
|
|
| Â Â |
| Â | Speculative Execution |
| | Statistically avoid branch delay slots by guessing which way it will go, and then execute Expr2 or Expr3 speculatively | | | Must be able to undo Expr2 if we find that cond was false! |
|
http://cag-www.lcs.mit.edu/6.004/Lectures/lect25/sld016.htm
|
|
| Â Â |
| Â | Supercomputing Institute 1998 Research Reports |
| | "Coarse-Grained Speculative Execution in Shared-Memory Multiprocessors," I.H. Kazi and D.J. Lilja, in International Conference on Supercomputing, July 1998 p. |
|
http://www.msi.umn.edu/general/Reports/98.html
|
|
| Â Â |
| Â | 2000 Publications |
| | Kowalski, R. and Satoh, K. “Repairing speculative execution in the light of contrary information” |
|
http://www.doc.ic.ac.uk/rr2001/pubs2000.htm
|
|
|
