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| | Amazon.com: Programmable Logic Controllers, Third Edition: Books |
 | | This chapter is an introduction to t he programmable logic controller, its general function, hardware forms and internal architecture. | | | Bolton "This chapter is an introduction to t he programmable logic controller, its general function, hardware forms and internal architecture..." (more) | | | Text introduces programmable logic controllers for first year undergraduate students in engineering. |
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http://www.amazon.com/exec/obidos/tg/detail/-/0750659866?v=glance
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| | Catalsyt's ARChive |
| | In an Industrial Technology class, Robotics 424, under the mentoring of Dr. G.H. Massiha I was also exposed to programming through a Programmable Logic Controler (PLC). | | | A PLC is a simple control device designed specifically for industrial machines that performs logical operations compatible with traditional relay logic. | | | Ladder logic is another way of performing complex operations. |
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http://www.ucs.louisiana.edu/~ghm2469/robotics_project/plc.html
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| | Embedded News - Altera Releases FPGA with 20 High-Speed Transceiver Channels |
| | Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. | | | A soft DPA implementation, by contrast, ties up valuable logic resources, can rapidly consume a device's global clocks and phase locked loops (PLLs), and tends to become error-prone in the face of temperature or voltage variances. | | | Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. |
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http://www.embeddedstar.com/press/content/2003/5/embedded8774.html
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| | The Basics of Ladder Logic |
| | In years past, ladder logic was made possible with discrete relays and was sometimes termed “relay logic.” Today most implementations are done using a specialized microprocessor-based device called a programmable logic controller (PLC). | | | Ladder logic uses switch or relay contacts to implement Boolean expressions. | | | An XOR implementation for two inputs, which is actually [(A AND B') OR (A' AND B)] where the prime mark indicates a logical NOT or inversion, requires a type-A and a type-B contact for both inputs. |
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http://ecmweb.com/ops/electric_basics_ladder_logic/index.html
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| | US06842034-20050111.html |
| | a plurality of embedded intellectual property building blocks that are configurable based on signals received from the management data input/output configuration control block or signals received from the programmable logic device configuration control block. | | | a plurality of programmable logic device core building blocks that are programmable based on signals received from the configuration control block; | | | Vinson Chan, Fremont, Calif. (US); Chong Lee, San Ramon, Calif. (US); Rakesh Patel, Cupertino, Calif. (US); Ramanand Venkata, San Jose, Calif. (US); and Binh Ton, San Jose, Calif. (US) |
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http://www.uspto.gov/web/patents/patog/week02/OG/html/1290-2/US06842034-20050111.html
(108 words)
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| | FaQ |
| | A generic description of an FPGA is a programmable device with an internal array of logic blocks, surrounded by a ring of programmable input/output blocks, connected together via programmable interconnect. | | | It is far easier to change the internals of a programmable logic device than it is to re-layout a circuit board. | | | An FPIC is not really a logic device but rather a programmable "wiring" device. |
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http://www.geocities.com/abel_mutlu/faq1.htm
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| | Programmable logic device (EP0584911B1) |
| | The programmable logic device (PLD) of this invention includes two or more programmable logic blocks (101-A-101H) interconnected by a programmable switch matrix that includes a programmable input switch matrix (120) (input switch matrix) and a programmable centralized switch matrix (130) (centralized switch matrix). | | | Macrocell and clock signal allocation circuit for a programmable logic device (PLD) enabling PLD resources to provide multiple functions | | | Clock signal providing circuit with enable and a pulse generator with enable for use in a block clock circuit of a programmable logic device |
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http://www.delphion.com/details?&pn=EP00584911B1
(3560 words)
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| | Direct memory access controller (EP0328450B1) |
| | a programmable logic array part (22), a data transfer between the input/output device (51) and the memory device (52) being controlled by the microprograms of the microsequencer (21) in co-operation with said programmable logic part (22); | | | Each data transfer between the input/output device and the memory device is controlled by the microprograms of the microsequencer in cooperation with the programmable logic array part. | | | The programmable logic array part is coupled to the internal bus and outputs control information required during a next transfer cycle during one transfer cycle which corresponds to a predetermined number of system clock cycles. |
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http://www.delphion.com/details?pn=EP00328450B1
(243 words)
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| | Non-volatile storage device refresh time detector - US Patent 5852582 |
| | Many non-volatile storage devices are also programmable and/or erasable, and thus also include logic for performing program and erase functions. | | | Each non-volatile storage device is an integrated circuit and generally includes an array of memory cells, where each cell stores a bit of information, and also includes other logic for reading the stored information. | | | A timing apparatus for monitoring when a memory array in a non-volatile storage device needs to be refreshed includes a programmable semiconductor device and detecting means for detecting when the amount of charge on the programmable semiconductor device has diminished to at most a threshold amount. |
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http://www.patentstorm.us/patents/5852582.html
(4595 words)
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| | complex programmable logic device on GlobalSpec |
| | Device Programmers (74 companies) Device programmers are used to program nonvolatile memory such as microcontrollers, erasable programmable read-only memory (EPROM), programmable logic devices (PLDs), programmable array logic (PAL), generic array logic (GAL) and other electrically programmable devices. | | | Programmable Logic Controllers (PLCs) (368 companies) Programmable logic controllers (PLCs) are the control hubs for a wide variety of automated systems and processes. | | | Programmable Power Supplies (47 companies) Programmable power supplies are digitally controlled power sources that provide accurate and adjustable levels of voltage, current, and frequency. |
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http://www.globalspec.com/Industrial-Directory/complex_programmable_logic_device
(1814 words)
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| | Programmable logic devices (EP0537885B1) |
| | An asynchronous high density segmented programmable array logic device utilizes a programmable switch interconnection matrix to couple an array of symmetric programmable logic blocks. | | | Macrocell and clock signal allocation circuit for a programmable logic device (PLD) enabling PLD resources to provide multiple functions | | | Each output logic macrocell is provided three dedicated control product terms from the programmable product term array and each I/O macrocell is provided one control product term from the programmable product term array in one embodiment. |
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http://www.delphion.com/details?&pn=EP00537885B1
(1814 words)
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| | Field-programmable gate array - Wikipedia, the free encyclopedia |
| | The programmable logic components can be programmed to duplicate the functionality of basic logic gates (such as AND, OR, XOR, NOT) or more complex combinatorial functions such as decoders or simple math functions. | | | In most FPGAs, these programmable logic components (or logic blocks, in FPGA parlance) also include memory elements, which may be simple flip-flops or more complete blocks of memories. | | | A field-programmable gate array or FPGA is a semiconductor device containing programmable logic components and programmable interconnects. |
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http://en.wikipedia.org/wiki/FPGA
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| | United States Patent: 4,999,687 |
| | The combination 100 is an embodiment of the inventive logic element, with numerals 101, 102, and 103 referring, respectively to emitter, barrier, and collector of the RST device, numerals 1040, 1041 and 1042 referring to the input terminals, and numerals 105, 106 and 107 referring to the output terminals, load resistor, and voltage source, respectively. | | | The article of claim 5, wherein said electrical means comprise one or more of the logic elements other than the re-programmable logic element, such that the logic function that is to be executed by the re-programmable logic element is determined by said one or more of the multiplicity of logic elements. | | | Significantly, the re-programmable element performs a first logic function if the "control" terminal is at logic 0, and a second logic function if it is at logic 1. |
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http://www.ece.sunysb.edu/~serge/pat11.html
(3606 words)
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| | eeprom on GlobalSpec |
| | Device Programmers (52 companies) Device programmers are used to program nonvolatile memory such as microcontrollers, erasable programmable read-only memory (EPROM), programmable logic devices (PLDs), programmable array logic (PAL), generic array logic (GAL) and other electrically programmable devices. | | | Field Programmable Gate Array Atmel's AT40K and AT40KAL Series coprocessor FPGAs range from 5K to 50K usable gates and are designed for high-density, compute-intensive DSP and other fast logic designs. | | | EEPROM (56 companies) Electrically erasable programmable read-only memory (EEPROM) chips are similar to PROM devices, but require only electricity to be erased. |
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http://semiconductors.globalspec.com/Industrial-Directory/eeprom
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| | Direct memory access controller (EP0328450B1) |
| | a programmable logic array part (22), a data transfer between the input/output device (51) and the memory device (52) being controlled by the microprograms of the microsequencer (21) in co-operation with said programmable logic part (22); | | | Each data transfer between the input/output device and the memory device is controlled by the microprograms of the microsequencer in cooperation with the programmable logic array part. | | | The programmable logic array part is coupled to the internal bus and outputs control information required during a next transfer cycle during one transfer cycle which corresponds to a predetermined number of system clock cycles. |
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http://www.delphion.com/details?pn=EP00328450B1
(243 words)
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| | Programmable array logic -- Facts, Info, and Encyclopedia article |
| | Programmable array logic (PAL) is a (Click link for more info and facts about programmable logic device) programmable logic device used to implement combinational (The branch of philosophy that analyzes inference) logic (An electrical device that provides a path for electrical current to flow) circuits. | | | The devices have fixed-or, programmable-and-plane arrays of transistor cells to implement 'sum-of-products' binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs. | | | Gang programmers were used when more than just a few parts were needed and for large volumes the manufacturer would fabricate a custom metal mask for manufacturing so electrical programming could be eliminated to reduce cost. |
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http://www.absoluteastronomy.com/encyclopedia/p/pr/programmable_array_logic.htm
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| | NASA Survey on Programmable Logic |
| | Programmable Logic Controllers (PLCs) are solid-state members of the computer family, using integrated circuits instead of electromechanical devices to implement control functions. | | | Programmable Logic devices are becoming common within NASA and in industry. | | | This hybrid aspect of Programmable Logic may not be fully addressed when the devices are developed, tested, and verified. |
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http://smad-ext.grc.nasa.gov/rmo/plcsurvey
(358 words)
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| | Kanda UK - CUPL PLD Programmable Logic Device programmers and logic training |
| | Atmel simple PLD (Programmable Logic Device) such as 16V8 and 22V10 are flash based programmable logic, so are re-programmable 100's of times. | | | The 16V8 PLD is ideal for logic training and general electronics as it can be programmed to be logic gates, inverters, flip-flops and registers using the CUPL programmable logic description language. | | | CUPL Programmable Logic Description Language is a compiler that converts logic equations into a Fuse map (JEDEC file) for the PLD programmer. |
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http://www.kanda.com/cupl-pld-training.html
(358 words)
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| | 31581.990624&ELEMENT_SET=DECL |
| | The logic device structures may be used in analyzing systems, such as communication network address analyzing systems, but the logic device structures may also be used as part of a micro-processor architecture. | | | By use of such memory logic cells or memory elements, the programming or re-programming of new logic functions into the programmable logic execution unit is performed by programming the memory elements, said programming preferably being done in one clock-cycle or one memory- write cycle. | | | Here, a memory logic cells may be structured so that an input bit signal is fed to a first logic element input and the complementary of the input bit signal is fed to a second logic element input, with a comparison output signal being given on the logic element output. |
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http://www.wipo.int/cgi-pct/guest/getbykey5?KEY=99/31581.990624&ELEMENT_SET=DECL
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| | Business Wire: 5-V MCU Support IC Has 2,500 Gate CPLD, EPROM &... @ HighBeam Research |
| | Any system that is using conventional programmable logic to connect multiple MCUs to each other or to connect an MCU to an external device, such as a sensor, face several drawbacks that are eliminated by the ZPSD6XX Micro-Cell programmable logic. | | | The ZPSD6XX integrates 2,500 gates of Micro-Cell(TM) programmable logic with 128 Kbytes of EPROM, 512 bytes of SRAM, extra I/O and a programmable MCU interface. | | | All MCUs require address bus, data bus, chip select, and read or write signals to communicate with microperipherals implemented in programmable logic. |
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http://www.highbeam.com/library/doc0.asp?DOCID=1G1:20554063&refid=holomed_1
(1205 words)
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| | Programmable logic device - definition of Programmable logic device in Encyclopedia |
| | The first programmable logic devices for the commercial market were introduced by Monolithic Memories, Inc.(MMI) under the name of PAL (Programmable array logic), although IBM produced similar devices for internal use in the mid-1970s. | | | A programmable logic device or PLD is an electronic component used to build digital circuits. | | | A PLD is a combination of a logic device and a memory device. |
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http://encyclopedia.laborlawtalk.com/Programmable_logic_device
(1235 words)
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| | Programmable logic device - Articles and Information |
| | A programmable logic device or PLD is an electronic component used to build digital circuits. | | | A PLD is a combination of a logic device and a memory device. | | | Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. |
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http://www.ezresult.com/article/Programmable_logic_device
(1235 words)
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| | Combinatorial |
| | Specialty definitions using "combinatorial": A Language for Intelligent Combinatorial Exploration ♦ Charme, combinator, combinatorial test, computational geometry ♦ DNA computing ♦ full array ♦ geometrical average ♦ k-statistics ♦ Lady Mary Jane ♦ Marie-Johanna, metaheuristic ♦ NP-hard ♦ Programmable Array Logic, programmable logic array, programmable logic device ♦ simulated annealing, Splim ♦ uncomputable function. | | | Schaltnetz (combinational circuit, combinational logic system, combinatorial circuit), kombinatorisches Potenzmittel (combinatorial power mean), kombinatorischer Test (combinatorial test), kombinatorische Klassifikation (combinatorial classification), kombinatorische Explosion (combinatorial explosion), Alice (A Language for Intelligent Combinatorial Exploration, ALICE). | | | combinatorische toets (combinatorial test), combinatorische explosie (combinatorial explosion), combinatorische classificatie (combinatorial classification), combinatorisch moment (combinatorial power mean), schakelnet (automatic network, combinational circuit, combinational logic system, combinatorial circuit, dialing network, switched network), schakelkring (combinational circuit, combinational logic system, combinatorial circuit). |
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http://www.websters-online-dictionary.org/definition/Combinatorial
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| | What is Programmable Logic? |
| | Logic devices can be classified into two broad categories - fixed and programmable. | | | In fact, thanks to programmable logic devices, a number of equipment manufacturers now tout the ability to add new features or upgrade products that already are in the field. | | | On the other hand, programmable logic devices (PLDs) are standard, off-the-shelf parts that offer customers a wide range of logic capacity, features, speed, and voltage characteristics - and these devices can be changed at any time to perform any number of functions. |
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http://www.xilinx.com/company/about/programmable.html
(600 words)
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| | Logic |
| | A programmable logic device or PLD is an electronic component used to build digital circuits. | | | home mortgages illinois mortgage rates prepaid credit cards home equity loan rate poker games east west mortgage home mortgage loan debt reduction plan Logical conjunction (Redirected from And (logic)) In logic and technical fields that use it, conjunction, or and, is a logical operator in logical calculi. | | | auto loan rates direct loan servicing center mortgage calculations gambling mortgage calculations guaranteed loans credit unions home equity loans refinancing Intuitionistic logic (Redirected from Constructivist logic) Intuitionistic logic, or constructivist logic, is the logic used in mathematical intuitionism and other forms of mathematical constructivism. |
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http://www.ezresult.com/related/Logic
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| | spd_010babd4.txt |
| | DIGITAL Software Product Description ___________________________________________________________________ PRODUCT NAME: BASEstar Open DAS for Modicon, Version 3.1 SPD 55.51.04 DESCRIPTION The BASEstar Open Device Access Software (DAS) for Modicon allows users to access Modicon Programmable Logic Controllers through BASEstar Open Device Services, BASEstar Open Data Services or DEComni Services. | | | Users can also perform a variety of device access functions for Mod- icon Programmable Logic Controllers using the Modicon DAS by inter- facing directly to DEComni APIs. | | | BASEstar Open Data Services provide device independent access to shop floor data allowing the user to configure data points, read and write data point values and generate events based on data changes. |
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http://12.38.114.134/MasterIndex/spd/spd_010babd4.txt
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| | APEX High-Bandwidth I/O Interface Support |
| | The central interface device on a board--often a high-density programmable logic device (PLD)--must be able to connect with a mixture of 3.3-, 2.5- and 1.8-V devices. | | | APEX devices can support up to 16 input and output LVDS channels, allowing for a programmable bandwidth of 26 Gbps. | | | GTL+: gunning transceiver logic; HSTL: high-speed transceiver logic; SSTL: stub-series terminated logic; PCI: peripheral component interconnect; AGP: advanced graphics port; LVCMOS: low-voltage complementary metal-oxide semiconductor; LVTTL: low-voltage transistor-transistor logic; CTT: center tap terminated; LVPECL: low-voltage positive emitter-coupled logic |
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http://www.altera.com/products/devices/apex/features/apx-io.html
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| | Adaptor Incorporates Programmable Logic Device - 7/1/2000 - ECN - CA209615 |
| | Ironwood Electronics announces a new adaptor incorporating the Xilinx XC9536 CPLD (Complex Programmable Logic Device). | | | Adaptor Incorporates Programmable Logic Device - 7/1/2000 - ECN - CA209615 | | | Configurable Logic Device Combines ASIC and FPGA Technologies |
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http://www.ecnmag.com/article/CA209615.html
(553 words)
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| | Programmable array logic: Information From Answers.com |
| | Programmable array logic (PAL) is a programmable logic device used to implement combinational logic circuits. | | | The devices have fixed-or, programmable-and-plane arrays of transistor cells to implement 'sum-of-products' binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs. | | | The PALs were the first programmable logic devices for the commercial market, introduced by Monolithic Memories, Inc. (MMI). |
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http://www.answers.com/topic/programmable-array-logic
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